This invention relates to a field emission cold cathode for emitting electrons in response to an electric field applied between an electron source or emitter and a gate electrode without heating the emitter.
Generally, a field emission cold cathode comprises a semiconductor substrate operable as a part of an emitter, a plurality of sharp-pointed emitter cones formed on the semiconductor substrate, and a gate electrode having a plurality of gate holes each of which is formed around a tip of each emitter cone. The field emission cold cathode is responsive to an electric field applied between the emitter cones and the gate electrode to emit electrons from the tip of each emitter cone.
Description will hereafter be made about a typical field emission cold cathode as a first conventional device.
Referring to FIG. 1, the first conventional device comprises an n-type silicon substrate 31, a plurality of sharp-pointed emitter cones 32 formed on the n-type silicon substrate 31 as an emitter array, and a gate electrode 34 having a plurality of gate holes for passage of electrons emitted from tips of the emitter cones 32. Typically, an insulator layer 33 is interposed between the n-type silicon substrate 31 and the gate electrode 34. The insulator layer 33 has a plurality of insulator holes so as to surround each emitter cone 32.
In the first conventional device of the above-mentioned structure, spike noise of a large amplitude may often be caused to occur when it is switched on. Following occurrence of the spike noise, discharge may instantaneously be caused between the gate electrode 34 and the emitter cones 32.
In case where the discharge is continued, the emitter cones 32 will generate heat and begin to melt. Melted portions of the emitter cones 32 are splashed and adhered to the gate electrode 34 to result in short circuit between the gate electrode 34 and the emitter cones 32.
In order to avoid such short circuit between the gate electrode and the emitter cones 32 resulting from the continuous discharge, proposal is made of modified field emission cold cathodes which will hereunder be described as second and third conventional devices.
Referring to FIG. 2, the second conventional device comprises a resistor layer 35 interposed between the n-type silicon substrate 31 and the emitter cones 32. The resistor layer 35 has a high resistance and serves to restrict an electric current flowing to the emitter cones 32. With this structure, the electric current is suppressed to a level such that the above-mentioned short circuit does not occur.
Referring to FIG. 3, the third conventional device disclosed in Japanese Unexamined Patent Publication (JP-A) No. 87957/1996 comprises a plurality of field effect transistors (FET) in one-to-one correspondence to the emitter cones 32. Specifically, for each emitter cone 32, two n-type regions 37 are formed in a p-type silicon substrate 36. One of the n-type regions 37 serves as an FET source region with an FET source electrode 39 mounted thereon while the other n-type region 37 serves as an FET drain region. The emitter cone 32 is located on the drain region. An FET gate electrode 38 is located on the insulator layer 33 between the FET source and the FET drain regions both of which are formed in the p-type silicon substrate 36.
With this structure, the electric current flowing to the emitter cone 32 can be controlled by an input voltage applied to the FET gate electrode 38 so as to flow a constant current to the emitter cone 32. It is thus possible to avoid occurrence of the discharge.
However, the above-mentioned second and the third devices have following disadvantages.
In the second conventional device, voltage drop becomes inevitably large due to the resistor layer 35. It is therefore required to increase a drive voltage applied between the gate electrode 34 and the emitter cones 32. As seen from the figure, the resistor layer 35 is continuously formed in common to the emitter cones 32, not separately in one-to-one correspondence thereto. If the emitter cones 32 are arranged at a smaller interval to increase the density, an electromagnetic interference between the emitter cones is inevitable in this structure. This makes it difficult to effectively control an emission current from each individual emitter cone 32. In addition, the resistor layer 35 has a central zone and a peripheral zone surrounding the central zone. The central zone is remote from the peripheral zone. In this connection the central zone of the resistor layer 35 has a higher resistance value than the peripheral zone. This results in an increase of voltage drop at the central zone. As a consequence, it is difficult to emit the electrons from the emitter cones 32 located nearer to the central zone.
On the other hand, the third conventional device comprises the FETs in one-to-one correspondence to the emitter cones 32. This inevitably requires a complicated manufacturing process and increases the production cost. In addition, the size of the device is increased because the FET is provided for each of the emitter cones 32. Furthermore, the density of the emitter cones 32 can not be increased.
Another field emission cold cathode is disclosed in Japanese Unexamined Patent Publication (JP-A) No. 106846/1996 and will hereunder be described as a fourth conventional device. The fourth conventional device has a groove around the gate electrode surrounding the emitter array of the emitter cones. With this structure, it is possible to prevent occurrence of a leak current at an outer peripheral edge of the emitter array where the emitter cones and the gate electrode are exposed.
However, in the fourth conventional device, it is impossible to avoid decrease of the resistance value in the semiconductor substrate at portions right under the emitter cones.
In the meanwhile, an electron emission characteristic is affected by a contact resistance between the bottom of each emitter cone and the silicon substrate. The contact resistance is increased with a decrease in contact area therebetween, namely, a decrease in bottom area of each emitter cone. With development of the semiconductor technology, a more and more finer structure is sought. As the structure becomes fine, the bottom area of each emitter cone also becomes small in area. Such a small bottom area or contact area brings about an increase of contact resistance as described above. This unfavorably affects the electron emission characteristic.
In fact, a structure capable of avoiding the increase in contact resistance is already proposed in Japanese Unexamined Patent Publication (JP-A) No. 138636/1992 and will hereunder be described as a fifth conventional device. The fifth conventional device comprises a silicide layer as an interface between the silicon substrate and the emitter cones. The presence of the silicide layer serves to suppress the increase of contact resistance.
However, even with the fifth conventional device, it is difficult to overcome the increase of contact resistance resulting from drastic decrease in size of emitter cones following the rapid development in semiconductor technology.
In addition, if the silicide layer is excessively thick, the emitter cones may be inclined or lowered in height.